{"schema":"https://ver.cy/schemas/card/1.0.0","id":"vr.tr.cpuid","code":"thing-q1024235","url":"https://ver.cy/models/thing/q1024235/","name":"CPUID","alternateNames":[],"kind":"thing","status":"published","version":"0.1.0-research.1","language":"en","classifiers":{"family":"Thing Registry","category":"Information and virtual systems","entryKind":"thing","plane":"INF","domain":["INF.KNW"],"industry":[],"navPath":"","tags":[],"facets":{}},"whatItIs":"CPUID is an x86 processor instruction that returns processor identification, capability and configuration information through registers selected by an input function number and, for some functions, a subfunction number.","purpose":"Enable an agent to recognize CPUID, interpret processor capability reports in context, and decide which additional checks are needed before using those capabilities.","scope":{"in":["The CPUID instruction and its leaf and subleaf query interface","Raw register responses and their documented interpretation","Reported processor identity, features, topology, and cache information","Vendor-specific enumeration rules and unsupported queries","Execution context, virtualization, and capability decision prerequisites"],"out":["Processor hardware design, manufacture, and lifecycle","The CPUID software company and its products","Complete operating system processor initialization and scheduling","Benchmark results and measured application performance","General instruction set semantics beyond CPUID and its interpretation dependencies","Hardware identity attestation and asset ownership records"],"boundaries":[]},"distinguishingFeatures":["Denotes an executable x86 instruction with selector-dependent register results, rather than a single permanent CPU identifier.","Uses EAX to select a leaf and, for applicable leaves, ECX to select a subleaf; responses occupy EAX, EBX, ECX, and EDX.","Reports processor identity and capability information rather than measuring instruction throughput or application speed.","Its mnemonic names an architectural interface; a diagnostic utility that invokes it is a separate software artifact.","A reported feature and a feature usable by the current process require separate judgments."],"structure":{"bundles":[{"id":"instruction-and-query-contract","name":"Instruction and query contract","description":"Identify the intended instruction and preserve the inputs needed to interpret each response.","layers":[{"id":"referent-and-interface","name":"Referent and interface","description":"Resolve what CPUID denotes and establish its register-based interface.","findings":[{"id":"selector-dependent-register-interface","name":"Selector-dependent register interface","description":"CPUID returns identification and feature information in EAX, EBX, ECX, and EDX. Model the instruction separately from each observation. Reference: [Intel architecture programming reference](https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference-737410.pdf).","questions":[{"text":"Does the registry's originating record identify the x86 instruction rather than the CPUID company or a utility?","id":"selector-dependent-register-interface-q01","kind":"definition"},{"text":"Which EAX leaf and applicable ECX subleaf produced this response?","id":"selector-dependent-register-interface-q02","kind":"measurement"}]}]},{"id":"enumeration-boundaries","name":"Enumeration boundaries","description":"Determine which queries are meaningful and how enumeration terminates.","findings":[{"id":"range-and-subleaf-validity","name":"Range and subleaf validity","description":"Standard and extended function ranges require explicit handling; retain range discovery and leaf-specific enumeration rules. Reference: [AMD CPUID specification](https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/design-guides/25481.pdf).","questions":[{"text":"What supported ranges and maximum selectors were observed?","id":"range-and-subleaf-validity-q01","kind":"measurement"},{"text":"Which documented validity and termination rules apply to this leaf's subleaves?","id":"range-and-subleaf-validity-q02","kind":"boundary"}]}]}]},{"id":"identity-and-decoding","name":"Identity and decoding","description":"Interpret reported identity and register fields under the correct architectural authority.","layers":[{"id":"processor-signature","name":"Processor signature","description":"Relate identification fields to documented processor classifications.","findings":[{"id":"family-model-stepping-interpretation","name":"Family, model, and stepping interpretation","description":"Processor signature interpretation requires documented family and model decoding rules. Reference: [Intel CPUID enumeration guidance](https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/cpuid-enumeration-and-architectural-msrs.html).","questions":[{"text":"Which raw signature fields and vendor-specific rules support the decoded family, model, and stepping?","id":"family-model-stepping-interpretation-q01","kind":"provenance"},{"text":"What evidence would be needed before associating this report with one physical asset?","id":"family-model-stepping-interpretation-q02","kind":"boundary"}]}]},{"id":"field-meaning-and-authority","name":"Field meaning and authority","description":"Keep raw values distinct from named capabilities and interpretation revisions.","findings":[{"id":"traceable-bit-decoding","name":"Traceable bit decoding","description":"Each decoded claim should identify its leaf, subleaf, register, bit or field, and supporting specification; retain unrecognized fields without assigning invented meanings.","questions":[{"text":"Which document revision and field definition justify this decoded claim?","id":"traceable-bit-decoding-q01","kind":"provenance"},{"text":"Is this field defined, reserved, or outside the decoder's supported scope?","id":"traceable-bit-decoding-q02","kind":"boundary"}]}]}]},{"id":"reported-capabilities-and-use","name":"Reported capabilities and use","description":"Connect capability reports to software decisions and structural interpretations.","layers":[{"id":"feature-dispatch-prerequisites","name":"Feature dispatch prerequisites","description":"Distinguish a reported processor capability from permission and readiness to execute dependent code.","findings":[{"id":"usable-feature-decision","name":"Usable feature decision","description":"Record the complete prerequisite check for a proposed code path, including applicable operating system extended-state enablement, rather than treating one feature bit as sufficient.","questions":[{"text":"Which CPUID fields and non-CPUID state checks does this code path require?","id":"usable-feature-decision-q01","kind":"action"},{"text":"What fallback should the agent select when a prerequisite is absent or unverified?","id":"usable-feature-decision-q02","kind":"action"}]}]},{"id":"topology-and-cache-reports","name":"Topology and cache reports","description":"Interpret structural reports with explicit units, scope, and derivation rules.","findings":[{"id":"structural-report-interpretation","name":"Structural report interpretation","description":"For available topology and cache queries, retain raw fields and decoding formulas, and separate the reported structure from operating system availability and measured performance.","questions":[{"text":"Which queries and formulas support the reported cache dimensions or topology relationships?","id":"structural-report-interpretation-q01","kind":"measurement"},{"text":"How does the reported structure relate to the processors available to this process?","id":"structural-report-interpretation-q02","kind":"boundary"}]}]}]},{"id":"observation-context-and-confidence","name":"Observation context and confidence","description":"Preserve where a report came from and determine how far its claims may be generalized.","layers":[{"id":"physical-and-virtual-context","name":"Physical and virtual context","description":"Attach observations to their logical processor and any known virtualization boundary.","findings":[{"id":"report-origin-and-mediation","name":"Report origin and mediation","description":"Record whether the report was collected directly, supplied by another tool, or obtained inside a virtual environment, and leave host hardware conclusions unresolved where mediation is unknown.","questions":[{"text":"Which collector, logical processor or vCPU, and execution environment produced the report?","id":"report-origin-and-mediation-q01","kind":"provenance"},{"text":"What evidence establishes whether the reported capabilities reflect a guest-visible configuration or physical hardware?","id":"report-origin-and-mediation-q02","kind":"boundary"}]}]},{"id":"coverage-and-revalidation","name":"Coverage and revalidation","description":"Determine whether collected evidence supports the intended decision and when it needs refreshing.","findings":[{"id":"decision-specific-evidence-coverage","name":"Decision-specific evidence coverage","description":"Record missing queries, collection failures, and differences between processor observations; define revalidation conditions for decisions that depend on those reports.","questions":[{"text":"Does the report cover every selector and execution context required by the proposed decision?","id":"decision-specific-evidence-coverage-q01","kind":"measurement"},{"text":"Which changes to processor placement, virtual machine configuration, or system state require recollection?","id":"decision-specific-evidence-coverage-q02","kind":"action"}]}]}]},{"id":"evidence-and-external-alignment","name":"Evidence and external alignment","description":"What the world already says about this thing, gathered so the model can be checked against it.","layers":[{"id":"reported-evidence","name":"Reported evidence","description":"Findings from the breadth pass, kept separate from the structural claims.","findings":[{"id":"evidence-confidence-notes","name":"Check these first","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these check these first hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-confidence-notes-q01","kind":"provenance"}]},{"id":"evidence-identifiers","name":"Identifiers and schemes","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these identifiers and schemes hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-identifiers-q01","kind":"provenance"}]},{"id":"evidence-standards-and-regulation","name":"Standards and regulation","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these standards and regulation hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-standards-and-regulation-q01","kind":"provenance"}]},{"id":"evidence-real-world-use","name":"Real-world use","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these real-world use hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-real-world-use-q01","kind":"provenance"}]},{"id":"evidence-measurements","name":"Typical measurements","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these typical measurements hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-measurements-q01","kind":"provenance"}]},{"id":"evidence-failure-modes-and-hazards","name":"Failure modes and hazards","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these failure modes and hazards hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-failure-modes-and-hazards-q01","kind":"provenance"}]},{"id":"evidence-neighbours","name":"Neighbouring kinds and how to tell them apart","description":"Recalled without web access and unsourced; every item is a lead to verify.","questions":[{"text":"Which of these neighbouring kinds and how to tell them apart hold for the sense of CPUID this model covers, and on what evidence?","id":"evidence-neighbours-q01","kind":"provenance"}]}]}]}]},"agentConduct":{"may":["Query processor capabilities on systems it is authorized to run on and report them.","Explain the instruction and its common leaves for developers."],"mustNot":["Use processor identification to fingerprint and track users without consent.","Spoof processor information to evade licensing or security controls.","Assume features are present without checking, risking crashes on other processors."],"requiresHuman":["Collecting hardware identifiers from users' machines."]},"ethics":{"considerations":["Hardware identifiers can be used to track people across services."],"affectedParties":["Users of the computers","Software developers","Owners of the machines"]},"owners":{"steward":"Nobody owns it; processor vendors document its behaviour.","roles":[],"masterSystems":[]},"relations":[{"target":"Q20816930","type":"parent","note":"registry parent class"}],"interaction":{"identity":{"applicability":"required","items":["Vercy registry: vr.tr.cpuid","Wikidata: Q1024235 (https://www.wikidata.org/wiki/Q1024235)"]},"properties":{"applicability":"not-applicable","items":["Referent interpretation: x86 instruction; unresolved alternative referent","Query selector: 32-bit EAX leaf and applicable 32-bit ECX subleaf, represented in hexadecimal","Raw response: Four unsigned 32-bit register values: EAX, EBX, ECX, EDX","Enumeration coverage: complete for declared scope; partial; unavailable; unknown","Reported processor identity: Vendor string, applicable family/model/stepping fields, optional brand string","Feature evidence state: reported present; reported absent; unqueried; reserved; undecoded","Execution context: Observation linked to logical processor or vCPU, process environment, and collection time","Decode authority: Vendor manual, revision, section, and applicable processor or interface scope","Capability usability: usable after checks; prerequisite missing; unsupported; undetermined"]},"recognition":{"applicability":"optional","items":["Appears in assembly code as the cpuid mnemonic, with a leaf number placed in the EAX register."]},"capabilities":{"applicability":"required","items":["Collect a bounded CPUID report while retaining query selectors and raw registers.","Decode identity and capability fields against an applicable vendor specification.","Determine which leaves and subleaves require further enumeration.","Compare reports across logical processors or execution environments.","Evaluate a software feature's prerequisites before selecting an implementation.","Flag incomplete, contradictory, or context-dependent reports for investigation."]},"hazards":{"applicability":"required","items":["Misread feature flags lead programs to crash on unsupported processors.","Virtual machines may report misleading values."]},"interfaces":{"applicability":"not-applicable","items":[]},"context":{"applicability":"required","items":["CPUID is used by operating systems, hypervisors, diagnostic programs and application libraries on x86 processors.","Its reported information supports processor identification, capability discovery and selection of compatible software execution paths.","Reported hardware capabilities may require additional operating system support checks before software can use them."]}},"sources":[{"title":"Wikidata item Q1024235: CPUID","url":"https://www.wikidata.org/wiki/Q1024235","note":"identity and sense of the item"},{"title":"Wikipedia: CPUID","url":"https://en.wikipedia.org/wiki/CPUID","note":"general description of the item"}],"openQuestions":["Does the originating registry record confirm the x86 instruction as the referent, and why was it assigned to INF.MED?","Does an existing Vercy world model already own CPUID or its processor capability enumeration contract?","Which processor vendors, architectural generations, and specification revisions should the first researched publication support?","Which hypervisor interfaces and vendor-specific leaves need explicit coverage, and which should remain extensions?","What minimum collection and operating system state evidence is required before an agent may approve a feature-dependent code path?"],"resources":{"spec":"/models/things/publications/thing-q1024235/spec.json"},"provenance":{"origin":"thing registry research (pass 2)","builtFrom":["models/things/publications/thing-q1024235/spec.json"],"providers":["Codex"],"researchStatus":"unreviewed","generatedAt":"2026-09-12T08:53:16Z","builder":"tools/build_cards.py@1.0.0"},"completeness":{"sections":{"classifiers":"filled","whatItIs":"filled","purpose":"filled","distinguishingFeatures":"filled","structure":"filled","agentConduct":"filled","ethics":"filled","owners":"filled","relations":"filled","interaction.identity":"filled","interaction.properties":"not-applicable","interaction.recognition":"filled","interaction.capabilities":"filled","interaction.hazards":"filled","interaction.interfaces":"not-applicable","interaction.context":"filled","sources":"filled"},"notes":{"_gate":"Published through the thing publication gate 1.0 on 2026-10-07T10:10:25+00:00: completeness 1.00; sense: Wikidata description; 2 live sources; review by codex: pass","interaction.properties":"Plane INF: no invented physical properties.","interaction.interfaces":"The instruction interface is defined by processor architecture specifications rather than an independently issued standard, law or official classification."},"score":1.0}}