← Back to catalogue
Research draft

bus

vr.tr.bus-q178048 · INF.KNW

Let an agent reason about a bus as a shared medium with arbitration, bandwidth and trust properties, rather than as a cable.

Thing Registry Information and virtual systems

Research draft, second pass

A second pass drafted this model: the structure a model of this thing needs, and what is known about it in the world. The line under this one says how the second half was obtained - researched against sources, or recalled without web access, in which case nothing here was read anywhere and every claim is a lead to verify. Unreviewed either way.

written by Claude from model knowledge without web access - no source was read, every claim is a lead to verify

Researched by: Claude

Purpose and description

Let an agent reason about a bus as a shared medium with arbitration, bandwidth and trust properties, rather than as a cable.

A shared communication pathway inside or between computers that carries data, addresses and control signals among several attached components under a common protocol.

What it is for: Connecting several components through one pathway so that they can exchange data without a dedicated link between every pair.

It can be attach and detach components, within the rules of the bus; measure its bandwidth and latency, which are shared by everything on it; monitor traffic on it, which any attached component may be able to do; saturate it, which degrades every component at once.

Distinguishing features

Shared among several components, which separates it from a dedicated point-to-point link

Requires arbitration, because only one sender can use the shared medium at a time

Defined by its protocol, not its wires: the same connector can carry different buses

Trust boundary: a component on the bus can often see or reach what other components exchange

What it looks like

Parallel traces on a circuit board, a connector with many pins, or a cable; the visible part says little, since the protocol defines the bus.

Physical character

bandwidth: 0.001-128 GB/s - from field buses to current PCI Express generations

width: 1-512 bits - serial buses are one lane per direction, parallel ones are wide

clock frequency: 0.1-32000 MHz

How it is recognised

Connector shape identifies the physical standard but not the protocol version negotiated over it

Parallel traces between chips on a board are often a bus, but can be point-to-point links

Many modern "buses" are serial point-to-point links with switches, and look nothing like the shared lines the word implies

Related models

is a kind of - inherits bandwidth, latency and error handling

communication channel

is confused with - a homonym; this entry is the computer bus and carries none of the transport questions

bus the vehicle

is confused with - the line has blurred as buses became switched serial links

network

connects - each attached component is a separate model with its own identity on the bus

device

In practice

Families and kinds

by scope: on-chip, system, peripheral, field

by signalling: parallel, serial

by topology: shared line, daisy chain, switched fabric

by standard: PCI Express, USB, I2C, CAN, SPI, and many others

Identifiers

bus address standard-specific identifies a component on the bus, not the component itself

vendor and device ID for example PCI vendor:device self-reported by the device and therefore spoofable

Standards and regulation

PCI-SIG specifications for PCI Express

USB-IF specifications for USB

ISO 11898 for CAN

Vendor specifications for I2C and SPI, which are de facto rather than formal standards

Failure modes and hazards

Contention and saturation, which slow every attached component

A faulty component holding the bus, which stops all traffic on it

Direct memory access from a hostile device over an exposed bus

Signal integrity loss at length or speed, producing intermittent errors that are hard to attribute

Also called

V-LinkVMEbusdrive interfaceU.2fieldbusKBusAries interconnectLow Pin CountFlexible Display InterfaceQ-Busserial busparallel buscontrol bussystem busHypercubeAvalon busdata busFireplaneexpansion busGSC busmulti-lane serial buslocal busI²SinterconnectCray Gemini interconnectXT3 Internal InterconnectBull BXIQuadricsXT4 Internal InterconnectHyperPlexSP Switchperipheral busquantum busFromAudio/modem riserthree-state bustorus interconnectvehicle busaddress busWire Train Bus

Where this came from

wikidata · CC0 1.0

Also registered as vr.tr.bus

Drafted structure

Bundle to layer to finding to question, as the second pass will find it: 4 bundles · 8 layers · 8 findings · 16 questions.

Topology and protocol How it is wired and what rules govern it.

The protocol defines the bus, and the topology decides how failures and contention propagate.

Protocol and version

The standard and the version actually negotiated.

Protocol in use

The standard, its version and the negotiated mode.

  1. Which bus protocol and version is in use, and what was negotiated? definition
  2. What happens when an attached component supports an older version? boundary

Topology

Shared, chained or switched.

Topology and its consequences

How components are connected and what that implies.

  1. What is the topology of this bus, and where are its single points of failure? definition
  2. How does a failure of one component affect the others? boundary
Capacity and performance How much it carries and how fast.

Bandwidth on a bus is shared, so the question is never how fast one component is but what everything together needs.

Bandwidth and latency

Rated and achieved throughput.

Throughput figures

The rated figure and what is actually achieved under load.

  1. What bandwidth and latency does this bus provide, rated and measured? measurement
  2. What load from all attached components does it have to carry? measurement

Arbitration

How access to the medium is shared.

Arbitration scheme

How senders take turns and who gets priority.

  1. How is access arbitrated, and which component has priority? definition
  2. What happens to a low-priority component under sustained load? boundary
Attached components What is on the bus and how it is identified.

Each component is identified by what it reports about itself, which is convenient and untrustworthy at once.

Enumeration

Discovering what is attached.

Discovered components

The components found and how they were identified.

  1. What components are attached, and how were they discovered? provenance
  2. What does a component self-reported identity actually establish? boundary

Compatibility

Whether a component can work on this bus.

Compatibility check

Electrical, protocol and driver compatibility.

  1. Is this component compatible electrically, by protocol and by driver? definition
  2. What should happen when an incompatible component is attached? action
Integrity and security Errors, isolation and hostile components.

A bus is a trust boundary that is usually treated as if it were not one.

Error handling

Detection and recovery of transmission errors.

Error behaviour

How errors are detected, counted and recovered.

  1. How are transmission errors detected and recovered on this bus? definition
  2. What error rate should prompt investigation, and of what? measurement

Isolation

What an attached component may reach.

Isolation controls

The controls that limit what a component can see or write.

  1. What memory or traffic can an attached component reach, and what limits it? boundary
  2. What should an agent do with a component it cannot identify? action

What the second pass must settle

  • Should shared buses and switched serial interconnects be separate models, given that their failure and trust properties differ?
  • How should a model record the negotiated version as distinct from the physical connector?
  • What trust assumptions should an agent make about devices it discovers on a bus?