{ "vercy": "1.0-draft", "publication": { "status": "research-draft", "adjudicationStatus": "unreviewed", "publishableCanonical": false, "generatedAt": "2026-09-12T10:30:43Z", "providers": [ "Codex" ], "breadth": "recalled by Codex without web access - no source was read", "missingProviders": [], "pass": 2, "cost": { "grok": { "seconds": 22.9, "error": "Reading additional input from stdin...\nOpenAI Codex v0.153.4\n--------\nworkdir: R:\\02_PROJECTS\\02_Meta_Models_Platforms\\Ver.cy\\current\\thing-registry-backlog\nmodel: gpt-6-astra\nprovider: openai\napproval: never\nsandbox: read-only\nreasoning effort: none\nreasoning summaries: none\nsession id: 01a0952a-5400-7ba1-a50b-1e73ea52421d\n--------\nuser\nDescribe what is already known about one registered thing. Answer as JSON only, no prose around it.\n\nThing: Intel 80486DX2\nSense to describe: (none recorded)\nDomain code: PHY.OBJ\nAlso known as: (none)\n\n\nContext for this batch of 1001 things:\n# Batch 043: 1001 ", "usd": 0.0, "recall": true }, "codex": { "seconds": 69.5, "error": "Reading additional input from stdin...\nOpenAI Codex v0.153.4\n--------\nworkdir: R:\\02_PROJECTS\\02_Meta_Models_Platforms\\Ver.cy\\current\\thing-registry-backlog\nmodel: gpt-6-astra\nprovider: openai\napproval: never\nsandbox: read-only\nreasoning effort: none\nreasoning summaries: none\nsession id: 01a0952a-540e-7d82-978e-6883534a2247\n--------\nuser\nYou are drafting a Vercy meta-model for one registered thing. Answer as JSON only, no prose around it.\n\nThing: Intel 80486DX2\nRegistry id: vr.tr.intel-80486dx2\nPlane / domain: PHY / PHY.OBJ\nRegistry definition: (none recorded)\nNames folded into this entry: (no" } }, "enrichment": { "pass": 3, "engine": "claude", "producedAt": "2026-10-06T12:00:00Z", "ingestedAt": "2026-10-06T08:54:24+00:00", "fields": [ "agent_conduct", "ethics", "failure_modes_and_hazards", "owners", "visual_identification" ] }, "gate": { "passed": true, "version": "1.0", "at": "2026-10-07T10:10:30+00:00", "evidence": [ "completeness 1.00", "sense: Wikidata description", "2 live sources", "review by codex: pass" ] } }, "metaModel": { "id": "THING-Q3272893", "registryId": "vr.tr.intel-80486dx2", "name": "Intel 80486DX2", "version": "0.1.0-research.1", "entryKind": "thing", "family": "Thing Registry", "domain": [ "PHY.OBJ" ], "status": "research-draft" }, "canonicalUrl": "https://ver.cy/models/thing/q3272893/", "model": { "registry_id": "vr.tr.intel-80486dx2", "name": "Intel 80486DX2", "purpose": "Enable an agent to recognize an Intel 80486DX2, establish its variant and condition, and judge whether installation, operation or preservation is appropriate.", "definition": "The Intel 80486DX2 is a family of 32-bit x86 microprocessors with an integrated floating-point unit and 8 KiB on-chip cache, distinguished by a processor core that runs at twice the external bus clock frequency.", "scope_statement": "This model owns the Intel 80486DX2 processor family registered as vr.tr.intel-80486dx2 in PHY / PHY.OBJ, including distinctions needed to assess individual examples without treating the family, a specific part number and a physical chip as interchangeable.", "in_scope": [ "Intel manufacturer identity, processor markings, part numbers and stepping evidence", "DX2 clock doubling, instruction execution, floating-point hardware and internal cache", "Variant-specific package, electrical, timing and thermal requirements", "Compatibility with a documented motherboard and firmware configuration", "Physical condition, diagnostic evidence and handling decisions" ], "out_of_scope": [ "The complete 80486 architecture as an independently modeled processor class", "AMD and Cyrix processors marketed with similar DX2 names", "Motherboard, chipset, external cache and memory as independently maintained objects", "Operating systems, applications and their general installation procedures", "Intel corporate history and semiconductor manufacturing processes", "Separate registry entries for speed grades or steppings without an explicit granularity requirement" ], "distinguishing_features": [ "Require Intel provenance and a documented DX2 part designation; a DX2 label or compatible instruction set alone does not establish this identity.", "Verify a nominal internal-to-external clock ratio of 2:1, the defining distinction from the corresponding single-clock Intel486 DX. Reference: [Intel DX2 data book](https://www.bitsavers.org/components/intel/80486/Intel486_DX2_Microprocessor_Data_Book_Jul92.pdf).", "Confirm integrated floating-point hardware, distinguishing the DX2 feature profile from SX-class alternatives; a failed floating-point test requires diagnosis rather than automatic reclassification.", "Check the documented 8 KiB on-chip cache shared by code and data as part of the identification profile, without treating cache capacity alone as proof of identity.", "Resolve ordinary processor and OverDrive upgrade-product designations before assuming identical package, socket or installation requirements." ], "characteristics": [ { "name": "Documented variant identity", "kind": "category", "unit_or_values": "Intel part designation, speed suffix, specification code and stepping where documented; unresolved", "why_it_matters": "Determines which technical limits and errata apply." }, { "name": "Core and external clock frequencies", "kind": "measurement", "unit_or_values": "MHz, recorded separately as rated, configured or measured", "why_it_matters": "A core frequency cannot substitute for the motherboard bus frequency." }, { "name": "Core-to-external clock ratio", "kind": "measurement", "unit_or_values": "Dimensionless; nominally 2", "why_it_matters": "Tests the defining DX2 operating relationship." }, { "name": "Internal cache", "kind": "category", "unit_or_values": "8 KiB unified code/data cache; variant-specific policy and enabled state recorded separately", "why_it_matters": "Distinguishes architectural capacity from configuration and avoids assuming every variant has identical cache behavior." }, { "name": "Floating-point execution state", "kind": "state", "unit_or_values": "Untested; verified; failing; configuration-dependent", "why_it_matters": "Separates a documented integrated capability from demonstrated operation." }, { "name": "Package and connection specification", "kind": "category", "unit_or_values": "Documented package code, pin count, orientation reference and pinout", "why_it_matters": "Physical fit alone does not establish electrical compatibility." }, { "name": "Supply requirements", "kind": "measurement", "unit_or_values": "V and A, with tolerances and operating conditions from the applicable specification", "why_it_matters": "Prevents applying one variant's electrical requirements to another." }, { "name": "Thermal operating margin", "kind": "measurement", "unit_or_values": "Degrees Celsius relative to the documented limit, with measurement location and workload", "why_it_matters": "Makes cooling adequacy assessable without confusing case, ambient and junction temperatures." }, { "name": "Host compatibility", "kind": "relation", "unit_or_values": "Processor variant linked to motherboard revision, socket, chipset, firmware and jumper configuration", "why_it_matters": "Compatibility belongs to a specific pairing and configuration." }, { "name": "Physical and functional condition", "kind": "state", "unit_or_values": "Uninspected; physically damaged; untested; partially tested; verified under recorded conditions; fault observed", "why_it_matters": "Supports handling and reuse decisions without equating appearance or successful boot with full function." } ], "affordances": [ "Identify a marked chip and attach the technical documentation applicable to its variant.", "Assess a proposed motherboard pairing using pinout, voltage, clock and firmware evidence.", "Select documented clock and cooling conditions for a compatible installation.", "Run and interpret separate integer, floating-point, cache and memory-interface diagnostics.", "Isolate processor faults from motherboard, memory, power and cooling faults.", "Choose installation, further testing, preservation or retirement based on documented condition." ], "agent_conduct": { "may": [ "Describe this processor family, its clock-doubling design and its history from technical sources.", "Identify a chip from its markings and help restore a vintage computer the user owns." ], "must_not": [ "Sell a remarked or counterfeit chip as a genuine part or a faster grade.", "Advise overclocking or running it without adequate cooling in equipment others rely on.", "Discard old boards in household waste instead of electronic waste collection." ], "requires_human": [ "Using vintage hardware in a system that controls machinery or safety functions." ] }, "ethics": { "considerations": [ "Remarked vintage chips defraud collectors.", "Old electronics contain lead and other materials that harm people when dumped." ], "affected_parties": [ "Collectors and restorers", "Recycling workers" ] }, "owners": { "steward": "The person who owns it.", "master_systems": [] }, "visual_identification": [ "A square ceramic or plastic chip with a grid of pins underneath.", "Top markings show the maker's model number, speed rating and date code." ], "failure_modes_and_hazards": [ "Overheats without a heat sink at higher speed grades.", "Bent pins and static discharge can destroy it." ], "what_it_is_for": [ "This processor family is encountered in early 1990s personal computers, legacy industrial equipment and historical computing collections.", "It is used in restoration and compatibility work where the processor variant, motherboard support and operating conditions must be established." ], "standards_and_regulation": [ "IEC 61340-5-1, issued by the International Electrotechnical Commission, specifies electrostatic discharge control requirements relevant to handling this electronic component." ] }, "sources": [ { "id": "wikidata", "title": "Wikidata item Q3272893: Intel 80486DX2", "url": "https://www.wikidata.org/wiki/Q3272893", "url_status": "live", "what_it_supports": "identity and sense of the item", "checked_by": "wikidata-api" }, { "id": "wikipedia-en", "title": "Wikipedia: Intel DX2", "url": "https://en.wikipedia.org/wiki/Intel_DX2", "url_status": "live", "what_it_supports": "general description of the item", "checked_by": "wikidata-api sitelink" } ], "structure": { "bundles": [ { "id": "identity-and-family-boundary", "name": "Identity and family boundary", "description": "Establish which Intel DX2 designation is represented and what evidence supports that identity.", "rationale": "DX2 branding, compatible processors and upgrade products can conceal materially different parts.", "layers": [ { "id": "markings-and-documentation", "name": "Markings and documentation", "description": "Connect observed package markings to manufacturer documentation.", "findings": [ { "id": "documented-part-identity", "name": "Documented part identity", "description": "Record the complete marking and the source used to interpret it, preserving unresolved or contradictory evidence.", "questions": [ { "text": "Which manufacturer, part designation, speed suffix and specification or stepping codes are actually visible?", "kind": "provenance", "id": "documented-part-identity-q01" }, { "text": "Which Intel document maps those markings to a DX2 variant, and does its revision cover this example?", "kind": "provenance", "id": "documented-part-identity-q02" } ] } ] }, { "id": "related-processor-boundaries", "name": "Related processor boundaries", "description": "Separate this registry concept from adjacent processor and upgrade-product concepts.", "findings": [ { "id": "dx2-membership", "name": "DX2 membership", "description": "Keep manufacturer, architectural family, marketed product and physical specimen distinct.", "questions": [ { "text": "What evidence distinguishes this candidate from an Intel486 DX, SX-class processor or another manufacturer's DX2-compatible part?", "kind": "boundary", "id": "dx2-membership-q01" }, { "text": "If the marking identifies an OverDrive product, does the registry include it here or require a relation to a neighboring entry?", "kind": "boundary", "id": "dx2-membership-q02" } ] } ] } ] }, { "id": "clocking-and-execution", "name": "Clocking and execution", "description": "Represent the relationship between external clocking and internal processing capabilities.", "rationale": "DX2 performance and compatibility depend on distinguishing core operation from the slower external interface.", "layers": [ { "id": "clock-domains", "name": "Clock domains", "description": "Record rated and observed frequencies without conflating processor and bus speeds.", "findings": [ { "id": "clock-doubling-evidence", "name": "Clock-doubling evidence", "description": "Track the external clock, internal frequency and evidence for the nominal doubling relationship.", "questions": [ { "text": "What core and external clock frequencies are specified for the identified speed grade?", "kind": "measurement", "id": "clock-doubling-evidence-q01" }, { "text": "How was the configured external clock established, and what evidence supports the inferred or measured internal frequency?", "kind": "measurement", "id": "clock-doubling-evidence-q02" } ] } ] }, { "id": "execution-capabilities", "name": "Execution capabilities", "description": "Distinguish documented integer, floating-point and memory-management capabilities from test results.", "findings": [ { "id": "instruction-and-fpu-behavior", "name": "Instruction and FPU behavior", "description": "Associate execution requirements and observed failures with the applicable DX2 programming documentation and stepping.", "questions": [ { "text": "Which instructions, execution modes and floating-point behavior does the intended software require from this DX2?", "kind": "definition", "id": "instruction-and-fpu-behavior-q01" }, { "text": "Which diagnostics demonstrate integer and floating-point operation, and what software configuration could affect their interpretation?", "kind": "action", "id": "instruction-and-fpu-behavior-q02" }, { "text": "Which documented stepping errata could explain a reproducible execution failure?", "kind": "provenance", "id": "instruction-and-fpu-behavior-q03" } ] } ] } ] }, { "id": "cache-and-host-interface", "name": "Cache and host interface", "description": "Capture internal-cache configuration and the processor's relationship to external memory and chipset behavior.", "rationale": "A DX2 can execute internally at its rated frequency while host-interface faults or cache settings limit or destabilize operation.", "layers": [ { "id": "internal-cache-behavior", "name": "Internal cache behavior", "description": "Separate cache capacity, supported policy and current configuration.", "findings": [ { "id": "cache-policy-and-state", "name": "Cache policy and state", "description": "Resolve cache behavior from the exact variant and host configuration rather than the DX2 name alone.", "questions": [ { "text": "What cache policy and control behavior are documented for this variant?", "kind": "provenance", "id": "cache-policy-and-state-q01" }, { "text": "Is the internal cache enabled, and what diagnostic evidence distinguishes a cache fault from a configuration effect?", "kind": "measurement", "id": "cache-policy-and-state-q02" } ] } ] }, { "id": "external-memory-coordination", "name": "External memory coordination", "description": "Model the processor-side requirements that the chipset and memory subsystem must satisfy.", "findings": [ { "id": "bus-and-coherency-fit", "name": "Bus and coherency fit", "description": "Link external timing and cache-coordination requirements to the documented motherboard configuration.", "questions": [ { "text": "Which bus timing, wait-state and burst-transfer settings does this processor-host pairing support?", "kind": "measurement", "id": "bus-and-coherency-fit-q01" }, { "text": "How does the chipset maintain correct memory visibility during DMA or other external memory activity?", "kind": "definition", "id": "bus-and-coherency-fit-q02" }, { "text": "Which observed failures implicate host memory or external cache rather than the DX2 itself?", "kind": "boundary", "id": "bus-and-coherency-fit-q03" } ] } ] } ] }, { "id": "installation-and-operating-envelope", "name": "Installation and operating envelope", "description": "Establish the mechanical, electrical and thermal conditions for a particular DX2 variant.", "rationale": "The family name cannot safely determine package fit, supply voltage, jumper settings or cooling requirements.", "layers": [ { "id": "package-and-power-fit", "name": "Package and power fit", "description": "Resolve connection and supply requirements before installation or power application.", "findings": [ { "id": "verified-installation-configuration", "name": "Verified installation configuration", "description": "Require a supported relationship between processor package, board revision, socket wiring and power configuration.", "questions": [ { "text": "Do package dimensions, pinout and orientation match the target socket and motherboard documentation?", "kind": "measurement", "id": "verified-installation-configuration-q01" }, { "text": "What supply voltage, tolerance and board jumper settings apply to this exact variant?", "kind": "action", "id": "verified-installation-configuration-q02" }, { "text": "Does a proposed adapter or upgrade socket introduce requirements beyond those of the processor itself?", "kind": "boundary", "id": "verified-installation-configuration-q03" } ] } ] }, { "id": "thermal-and-control-conditions", "name": "Thermal and control conditions", "description": "Tie cooling and processor-control actions to documented variant capabilities.", "findings": [ { "id": "supported-operating-states", "name": "Supported operating states", "description": "Record applicable thermal limits, reset requirements and supported idle or clock-control behavior.", "questions": [ { "text": "What temperature limit and measurement location does the applicable specification define, and what cooling meets it?", "kind": "measurement", "id": "supported-operating-states-q01" }, { "text": "Which reset, halt or clock-control states are supported by this variant and implemented by the motherboard?", "kind": "definition", "id": "supported-operating-states-q02" }, { "text": "What measured conditions require stopping a test or correcting the installation?", "kind": "action", "id": "supported-operating-states-q03" } ] } ] } ] }, { "id": "condition-diagnosis-and-preservation", "name": "Condition, diagnosis and preservation", "description": "Turn physical inspection and reproducible testing into decisions about a particular DX2 example.", "rationale": "Old processor specimens may have damaged connections, altered markings or host-dependent symptoms that a successful boot does not resolve.", "layers": [ { "id": "physical-evidence", "name": "Physical evidence", "description": "Inspect the package and connections while retaining identity and handling evidence.", "findings": [ { "id": "package-and-pin-condition", "name": "Package and pin condition", "description": "Record bent or missing pins, corrosion, package damage, surface alterations and attached cooling hardware.", "questions": [ { "text": "What pin, package or marking damage is visible, and how does it affect identification or insertion?", "kind": "measurement", "id": "package-and-pin-condition-q01" }, { "text": "What handling, cleaning or pin-repair action is justified without obscuring markings or worsening damage?", "kind": "action", "id": "package-and-pin-condition-q02" } ] } ] }, { "id": "functional-confidence", "name": "Functional confidence", "description": "Bound health claims by the host configuration, test coverage and observed operating conditions.", "findings": [ { "id": "reproducible-test-outcome", "name": "Reproducible test outcome", "description": "Keep boot success, subsystem test results and sustained stability as separate evidence.", "questions": [ { "text": "Which integer, floating-point, cache and memory-access tests passed under what clock, supply and temperature conditions?", "kind": "measurement", "id": "reproducible-test-outcome-q01" }, { "text": "Does the symptom follow the processor in a known-compatible host, or remain with the original motherboard and memory?", "kind": "boundary", "id": "reproducible-test-outcome-q02" }, { "text": "Does the evidence support reuse, additional diagnosis, preservation without operation or retirement?", "kind": "action", "id": "reproducible-test-outcome-q03" } ] } ] } ] }, { "id": "evidence-and-external-alignment", "name": "Evidence and external alignment", "description": "What the world already says about this thing, gathered so the model can be checked against it.", "rationale": "A model that cannot be lined up against existing standards, identifiers and practice cannot be adopted by anyone who already uses them.", "layers": [ { "id": "reported-evidence", "name": "Reported evidence", "description": "Findings from the breadth pass, kept separate from the structural claims.", "findings": [ { "id": "evidence-confidence-notes", "name": "Check these first", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ "This description is based on recall; no sources were consulted.", "Package, supply voltage, thermal limits and motherboard compatibility should be checked against the exact part and specification number.", "The listed speed grades are common examples; specialized and later variants require verification." ], "questions": [ { "id": "evidence-confidence-notes-q01", "text": "Which of these check these first hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-kinds", "name": "Kinds and varieties", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ "Intel 80486DX2-50", "Intel 80486DX2-66" ], "questions": [ { "id": "evidence-kinds-q01", "text": "Which of these kinds and varieties hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-identifiers", "name": "Identifiers and schemes", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ { "scheme": "Intel processor designation", "value_or_pattern": "Intel486 DX2; 80486DX2", "note": "Identifies the processor family rather than an individual chip." }, { "scheme": "Intel speed-grade designation", "value_or_pattern": "DX2-50; DX2-66", "note": "The numeric suffix denotes the nominal core clock frequency in MHz." }, { "scheme": "Intel specification number", "value_or_pattern": "sSpec code", "note": "Package markings distinguish particular processor specifications; exact codes require checking." } ], "questions": [ { "id": "evidence-identifiers-q01", "text": "Which of these identifiers and schemes hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-real-world-use", "name": "Real-world use", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ "Processor in IBM PC-compatible desktop computers.", "Execution of DOS and contemporary Windows software.", "Workstations and other systems requiring hardware floating-point computation.", "Restoration and operation of vintage personal computers." ], "questions": [ { "id": "evidence-real-world-use-q01", "text": "Which of these real-world use hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-measurements", "name": "Typical measurements", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ { "quantity": "Nominal core clock frequency", "typical_range": "50 or 66", "unit": "MHz" }, { "quantity": "External bus clock frequency", "typical_range": "25 or approximately 33", "unit": "MHz" }, { "quantity": "Core-to-bus clock ratio", "typical_range": "2:1", "unit": "dimensionless" }, { "quantity": "Unified on-chip instruction and data cache capacity", "typical_range": "8", "unit": "KiB" }, { "quantity": "External data bus width", "typical_range": "32", "unit": "bit" } ], "questions": [ { "id": "evidence-measurements-q01", "text": "Which of these typical measurements hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-failure-modes-and-hazards", "name": "Failure modes and hazards", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ "Electrostatic discharge can damage the processor during handling.", "Incorrect supply voltage or socket configuration can damage the processor.", "Inadequate cooling can cause overheating and unreliable operation.", "Bent or broken package pins can prevent reliable electrical connection.", "Operating above the rated clock frequency can cause instability and computation errors." ], "questions": [ { "id": "evidence-failure-modes-and-hazards-q01", "text": "Which of these failure modes and hazards hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] }, { "id": "evidence-neighbours", "name": "Neighbouring kinds and how to tell them apart", "description": "Recalled without web access and unsourced; every item is a lead to verify.", "evidence": [ { "name": "Intel 80486DX", "difference": "The DX ordinarily runs its core at the external bus clock frequency; the DX2 doubles that frequency internally." }, { "name": "Intel 80486SX", "difference": "The SX lacks an enabled integrated floating-point unit; the DX2 includes one." }, { "name": "Intel DX4", "difference": "The DX4 normally triples the external clock and has a larger on-chip cache; the DX2 doubles the clock." }, { "name": "Intel OverDrive processors", "difference": "OverDrive denotes processors marketed for upgrading existing systems, with installation requirements that distinguish them from ordinary DX2 components." }, { "name": "An individual Intel 80486DX2 chip", "difference": "An individual chip has its own manufacturing markings, condition and installation history; this entry describes the processor family." } ], "questions": [ { "id": "evidence-neighbours-q01", "text": "Which of these neighbouring kinds and how to tell them apart hold for the sense of Intel 80486DX2 this model covers, and on what evidence?", "kind": "provenance" } ] } ] } ] } ] }, "openQuestions": [ "Does the registry intend Intel 80486DX2 to include SL-enhanced, embedded, bare-die and OverDrive offerings, and which should instead be related concepts?", "What complete manufacturer mapping connects accepted part numbers and steppings to package, supply, speed, cache policy and control-state support?", "Which specification updates and errata apply to each included stepping, and which preliminary specifications were superseded?", "What evidence can reliably identify remarked or incompletely marked examples when software identification is unavailable or inconclusive?", "Does an existing Vercy world model already own this processor-family concept, requiring this registry entry to link to it?" ], "statistics": { "bundles": 6, "layers": 11, "findings": 17, "questions": 32 } }